Available for Technical Training

Empowering the Next Generation of Engineers.

Hi, I'm Abi Murugesan. A passionate Technical Trainer specializing in Java, Data Structures, and Chip Design Verification. I bridge the gap between academic theory and industry-ready excellence.

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7+ Colleges Trained
8.83 BE CGPA
Abi Murugesan

Technical Trainer

Java, C, & Data Structures Expert

Get to Know Me

Personal Profile

Career Objective

To work in an organization as a Technical Trainer that offers diverse opportunities to enhance my technical expertise and instructional capabilities. I aim to contribute to upskilling goals through effective curriculum design and mentoring of learners.

Details

Education Journey

2019 - 2023

BE. Computer Science and Engineering

Erode Sengunthar Engineering College | CGPA: 8.83

2018 - 2019

HSC (Higher Secondary)

VVCRM Sengunthar Girls School | 82%

2016 - 2017

SSLC (Secondary School)

St. Rita's Girls High School | 94.6%

Let's Connect

Ready to discuss training modules or chip verification projects?

+91 93610 29855 Email Me
My Professional Journey

Work Experience

Aug 2024 - Present

Junior Technical Trainer

Six Phrase Edutech Pvt Ltd, Coimbatore
  • Delivered specialized training in Java Basics, Advanced Java, and Data Structures.
  • Customized curriculum design to align with Tier-1 recruitment standards.
  • Conducted intensive lab sessions focusing on real-world problem solving and interview-centric coding.
  • Mentored students across 7+ prestigious Engineering Colleges (VSB, Nandha, Dr. Mahalingam, etc.).
Feb 2023 - Jul 2024

Associate Chip Design Verification Engineer

Edveon Technologies

Project: Block Level Verification of System Controller FSM

  • Managed verification for the Main Chip FSM controlling entire chip mechanisms.
  • Extracted features from specifications to arrive at comprehensive Verification Plans.
  • Developed UVM Testbenches from scratch and implemented directed/random testcases.
  • Achieved Coverage Closure through rigorous regression testing and bug filing.
Sep 2022 - Jan 2023

Chip Design Verification Trainee

Edveon Technologies, Chennai
  • Trained in System Verilog and UVM Methodologies.
  • Handled block-level verification tasks from plan to execution.
  • Utilized industry-standard tools like QuestaSim and CadenceSim.
My Expertise

Technical Stack

Software Development

Java (Basic & Advanced) 95%
Data Structures & Algorithms 90%
C Programming 85%

VLSI & Verification

System Verilog
UVM Methodology
FSM Verification
QuestaSim / Cadence

Instructional Capabilities

Curriculum Design Technical Mentoring Lab Session Leadership Corporate Recruitment Training Problem Solving Effective Communication
Get In Touch

Let's Work Together

Email Me

abimurugesh2002@gmail.com

Call/WhatsApp

+91 93610 29855

Location

Erode, Tamil Nadu, India